This invention relates to a memory capacity detecting device for various types of memory cards which include one or more memory chips.
FIG. 1 is a schematic view of a memory card which is generally used. Memory circuits shown in FIGS. 2 and 3 are well known in the art as a circuit of such memory cards. That is, the memory card shown in FIG. 2 has memory unit 10, three connector pins 12A, 12B and 12C connected to signal lines, and switches 13A, 13B and 13C which are grounded at one end and respectively connected at the other end to connector pins 12A, 12B and 12C. The switching states of switches 13A to 13C are determined to generate a capacity code of three bits representing the memory capacity of memory unit 10. The three bits of the capacity code are derived from connector pins 12A to 12C. That is, in this example, a 3-bit capacity code can be selectively determined to represent eight different memory capacities by selectively setting the switching states of switches 13A to 13C.
The memory card shown in FIG. 3 includes memory unit 18 formed of four semiconductor memory chips 14 to 17, and decoder circuit 19 for decoding a 2-bit address signal indicating the number of the memory chips to be used and supplying chip enable signals CS0 to CS3 to memory chips 14 to 17, respectively.
In the memory card of FIG. 3, the presence of each of the memory chips can be determined by writing data into a specified address location of the memory chip, reading out the data from the specified address location and then comparing data in the specified address location prior to the write-in operation and data read out from the specified address location. If it is detected that both data are the same, it is determined that the memory chip is present, but if not, then it is determined that the memory chip is not present. For example, if each of the memory chips has 8 K bytes and it is detected that memory chip 17 is not present, then the memory card is determined to have a memory capacity of 24 K bytes.
In the memory card of FIG. 2, it is necessary to provide switches 13A to 13C and the signal lines. Therefore, with the increase in the number of different memory capacities of the memory cards, it becomes necessary to increase the number of switches and signal lines, making the memory card complicated in construction. Further, since the switches are mechanically operated, the easy and reliable operation for determining the memory capacity cannot be attained.
In the memory card of FIG. 3, decoder circuit 19 is provided to decode an address signal of a number of bits which can represent the maximum number of memory chips to be used. The same type of decoder circuit with the complicated construction is used in a memory card even if it contains only one memory chip, making it expensive.
In general, most of the memory cards on the market are so designed that only an address signal of a number of bits corresponding to the number of memory chips used in the memory card can be decoded. In this case, when memory cards of various memory capacity are used as an auxiliary memory device in a computer system such as an electronic typewriter, there occurs a problem that the memory capacity of the memory card on the market cannot be detected.